The semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more of the smaller components to be integrated into a given area. These smaller electronic components also require smaller packages that utilize less area than previous packages. Some smaller types of packages for semiconductor components include quad flat packages (QFPs), pin grid array (PGA) packages, ball grid array (BGA) packages, and so on.
Currently, some package-on-package (POP) structures including an integrated fan-out package and at least one memory device stacked over the integrated fan-out package are developed and are becoming increasingly popular for their compactness. In the currently available POP structures, delamination issue may occur at the joint between the integrated fan-out package and the memory device. How to eliminate the delamination issue occurred at the joint between the integrated fan-out package and the memory device is highly concerned.